|
| enum | uvgv3cbitstream::APM {
uvgv3cbitstream::I_INTRA = 0
, uvgv3cbitstream::P_SKIP = 0
, uvgv3cbitstream::I_RAW = 1
, uvgv3cbitstream::P_MERGE = 1
,
uvgv3cbitstream::I_EOM = 2
, uvgv3cbitstream::P_INTER = 2
, uvgv3cbitstream::P_INTRA = 3
, uvgv3cbitstream::P_RAW = 4
,
uvgv3cbitstream::P_EOM = 5
, uvgv3cbitstream::I_END = 14
, uvgv3cbitstream::P_END = 14
} |
| |
| enum | uvgv3cbitstream::ATH { uvgv3cbitstream::P_TILE = 0
, uvgv3cbitstream::I_TILE = 1
, uvgv3cbitstream::SKIP_TILE = 2
} |
| |
| enum | uvgv3cbitstream::ATI {
uvgv3cbitstream::ATTR_TEXTURE = 0
, uvgv3cbitstream::ATTR_MATERIAL_ID = 1
, uvgv3cbitstream::ATTR_TRANSPARENCY = 2
, uvgv3cbitstream::ATTR_REFLECTANCE = 3
,
uvgv3cbitstream::ATTR_NORMAL = 4
, uvgv3cbitstream::ATTR_UNSPECIFIED = 15
} |
| |
| enum | uvgv3cbitstream::CGI {
uvgv3cbitstream::AVC_Progressive_High = 0
, uvgv3cbitstream::HEVC_Main_10 = 1
, uvgv3cbitstream::HEVC_Main_4_4_4_10 = 2
, uvgv3cbitstream::VVC_Main_10 = 3
,
uvgv3cbitstream::HEVC_Main = 4
, uvgv3cbitstream::MP4RA = 127
} |
| |
| enum | uvgv3cbitstream::FPO {
uvgv3cbitstream::FPO_NULL = 0
, uvgv3cbitstream::FPO_MROT270 = 1
, uvgv3cbitstream::FPO_SWAP = 1
, uvgv3cbitstream::FPO_ROT90 = 2
,
uvgv3cbitstream::FPO_ROT180 = 3
, uvgv3cbitstream::FPO_ROT270 = 4
, uvgv3cbitstream::FPO_MIRROR = 5
, uvgv3cbitstream::FPO_MROT90 = 6
,
uvgv3cbitstream::FPO_MROT180 = 7
} |
| |
| enum | uvgv3cbitstream::LI {
uvgv3cbitstream::Level_1_0 = 30
, uvgv3cbitstream::Level_1_1 = 33
, uvgv3cbitstream::Level_1_5 = 45
, uvgv3cbitstream::Level_2_0 = 60
,
uvgv3cbitstream::Level_2_1 = 63
, uvgv3cbitstream::Level_2_2 = 66
, uvgv3cbitstream::Level_2_5 = 75
, uvgv3cbitstream::Level_3_0 = 90
,
uvgv3cbitstream::Level_3_1 = 93
, uvgv3cbitstream::Level_3_2 = 96
, uvgv3cbitstream::Level_3_5 = 105
, uvgv3cbitstream::Level_4_0 = 120
,
uvgv3cbitstream::Level_4_1 = 123
, uvgv3cbitstream::Level_4_2 = 126
, uvgv3cbitstream::Level_4_5 = 135
, uvgv3cbitstream::Level_8_5 = 255
} |
| |
| enum | uvgv3cbitstream::MDI {
uvgv3cbitstream::max_1 = 0
, uvgv3cbitstream::max_2 = 1
, uvgv3cbitstream::max_3 = 2
, uvgv3cbitstream::max_4 = 3
,
uvgv3cbitstream::max_6 = 4
, uvgv3cbitstream::max_12 = 5
, uvgv3cbitstream::max_16 = 6
, uvgv3cbitstream::max_24 = 7
,
uvgv3cbitstream::max_32 = 8
, uvgv3cbitstream::unconstrained = 15
} |
| |
| enum | uvgv3cbitstream::NAL {
uvgv3cbitstream::NAL_TRAIL_N = 0
, uvgv3cbitstream::NAL_TRAIL_R = 1
, uvgv3cbitstream::NAL_TSA_N = 2
, uvgv3cbitstream::NAL_TSA_R = 3
,
uvgv3cbitstream::NAL_STSA_N = 4
, uvgv3cbitstream::NAL_STSA_R = 5
, uvgv3cbitstream::NAL_RADL_N = 6
, uvgv3cbitstream::NAL_RADL_R = 7
,
uvgv3cbitstream::NAL_RASL_N = 8
, uvgv3cbitstream::NAL_RASL_R = 9
, uvgv3cbitstream::NAL_SKIP_N = 10
, uvgv3cbitstream::NAL_SKIP_R = 11
,
uvgv3cbitstream::NAL_RSV_ACL_N12 = 12
, uvgv3cbitstream::NAL_RSV_ACL_R13 = 13
, uvgv3cbitstream::NAL_RSV_ACL_N14 = 14
, uvgv3cbitstream::NAL_RSV_ACL_R15 = 15
,
uvgv3cbitstream::NAL_BLA_W_LP = 16
, uvgv3cbitstream::NAL_BLA_W_RADL = 17
, uvgv3cbitstream::NAL_BLA_N_LP = 18
, uvgv3cbitstream::NAL_GBLA_W_LP = 19
,
uvgv3cbitstream::NAL_GBLA_W_RADL = 20
, uvgv3cbitstream::NAL_GBLA_N_LP = 21
, uvgv3cbitstream::NAL_IDR_W_RADL = 22
, uvgv3cbitstream::NAL_IDR_N_LP = 23
,
uvgv3cbitstream::NAL_GIDR_W_RADL = 24
, uvgv3cbitstream::NAL_GIDR_N_LP = 25
, uvgv3cbitstream::NAL_CRA = 26
, uvgv3cbitstream::NAL_GCRA = 27
,
uvgv3cbitstream::NAL_RSV_IRAP_ACL_28 = 28
, uvgv3cbitstream::NAL_RSV_IRAP_ACL_29 = 29
, uvgv3cbitstream::NAL_RSV_ACL_30 = 30
, uvgv3cbitstream::NAL_RSV_ACL_31 = 31
,
uvgv3cbitstream::NAL_RSV_ACL_32 = 32
, uvgv3cbitstream::NAL_RSV_ACL_33 = 33
, uvgv3cbitstream::NAL_RSV_ACL_34 = 34
, uvgv3cbitstream::NAL_RSV_ACL_35 = 35
,
uvgv3cbitstream::NAL_ASPS = 36
, uvgv3cbitstream::NAL_AFPS = 37
, uvgv3cbitstream::NAL_AUD = 38
, uvgv3cbitstream::NAL_V3C_AUD = 39
,
uvgv3cbitstream::NAL_EOS = 40
, uvgv3cbitstream::NAL_EOB = 41
, uvgv3cbitstream::NAL_FD = 42
, uvgv3cbitstream::NAL_PREFIX_NSEI = 43
,
uvgv3cbitstream::NAL_SUFFIX_NSEI = 44
, uvgv3cbitstream::NAL_PREFIX_ESEI = 45
, uvgv3cbitstream::NAL_SUFFIX_ESEI = 46
, uvgv3cbitstream::NAL_AAPS = 47
,
uvgv3cbitstream::NAL_CASPS = 48
, uvgv3cbitstream::NAL_CAF_IDR = 49
, uvgv3cbitstream::NAL_CAF_TRAIL = 50
, uvgv3cbitstream::NAL_RSV_NACL_51 = 51
,
uvgv3cbitstream::NAL_RSV_NACL_52 = 52
, uvgv3cbitstream::NAL_RSV_NACL_53 = 53
, uvgv3cbitstream::NAL_RSV_NACL_54 = 54
, uvgv3cbitstream::NAL_RSV_NACL_55 = 55
,
uvgv3cbitstream::NAL_UNSPEC_56 = 56
, uvgv3cbitstream::NAL_UNSPEC_57 = 57
, uvgv3cbitstream::NAL_UNSPEC_58 = 58
, uvgv3cbitstream::NAL_UNSPEC_59 = 59
,
uvgv3cbitstream::NAL_UNSPEC_60 = 60
, uvgv3cbitstream::NAL_UNSPEC_61 = 61
, uvgv3cbitstream::NAL_UNSPEC_62 = 62
, uvgv3cbitstream::NAL_UNSPEC_63 = 63
} |
| |
| enum | uvgv3cbitstream::TSI {
uvgv3cbitstream::V_PCC_Basic = 0
, uvgv3cbitstream::V_PCC_Extended = 1
, uvgv3cbitstream::MIV_Main = 64
, uvgv3cbitstream::MIV_Extended = 65
,
uvgv3cbitstream::MIV_Geometry_Absent = 66
, uvgv3cbitstream::MIV_2 = 67
, uvgv3cbitstream::MIV_Simple_MPI = 68
} |
| |
| enum | uvgv3cbitstream::VUT {
uvgv3cbitstream::V3C_VPS = 0
, uvgv3cbitstream::V3C_AD = 1
, uvgv3cbitstream::V3C_OVD = 2
, uvgv3cbitstream::V3C_GVD = 3
,
uvgv3cbitstream::V3C_AVD = 4
, uvgv3cbitstream::V3C_PVD = 5
, uvgv3cbitstream::V3C_CAD = 6
, uvgv3cbitstream::V3C_BMD = 7
,
uvgv3cbitstream::V3C_ADD = 8
} |
| |
